The engineering crucible
Torus Lab
We recruit the top 1% of deep-tech builders — engineers who want real hardware, real latency budgets, and real autonomy in GPS-denied airspace. This is not a comfortable corporate role. It is a filter for people who ship.
Apply — send your workFounder's note
Torus Ambitio exists to own the full physical AI stack — mathematics, middleware, and silicon — on Indian soil. We move faster than committees because we are a tight unit of scientists and technocrats co-designing software and NVIDIA edge compute in the same room as the airframes we fly.
I expect ownership. You will not be handed a ticket queue of easy tasks. You will touch occlusion failures, jitter in the motor loop, and the gap between a pristine simulation and a dusty field deployment. We measure progress in milliseconds, watts, and consecutive successful missions — not slide decks.
If you need a slow-moving org chart and passive mentorship, look elsewhere. If you want to build pure autonomous AI that leaves the lab and flies in contested environments, introduce yourself with evidence: code, sim recordings, thesis work, or a patch that proves you think in systems.
What we are solving now
Top engineers are bored by easy work. These are the bottlenecks between vision and flight — the problems you would actually own here.
Pixel fragility in contested airspace
Why it is hard: VIO and SLAM assume continuous high-contrast features. Smoke, glare, and textureless concrete break pixel anchors in milliseconds.
Done looks like: Geodesic-AI holds latent trajectories through 500 ms of total optical blinding.
Geodesic-AI™, Parallax-Array™, Continuum-Sim™
Sim perfection vs field mess
Why it is hard: NavierForge can log millions of clean hours. Wind gusts, EMI, payload shift, and sensor noise on the bench do not match the twin.
Done looks like: Automated gates block hardware release until 100 consecutive mission successes under injected degradation.
NavierForge Sim™, Continuum-Sim™, STRYX-1
Linux clock vs motor loop
Why it is hard: ROS 2 on Linux cannot guarantee sub-millisecond motor actuation. Jitter in the flight loop is not a tuning problem — it is an architecture problem.
Done looks like: Isochrone-RT keeps round-trip Linux ↔ FreeRTOS under 1.15 ms over DMA UART at 921,600 baud.
Isochrone-RT™, Soliton-Core™, STM32H743 coprocessor
Cognitive silicon at the watt budget
Why it is hard: V-JEPA-class models want memory bandwidth. The aircraft wants under 15 W on a Jetson Orin Nano while still planning at 30+ FPS.
Done looks like: INT8 quantization and TensorRT deployment on Soliton-Core with measured thermal headroom.
Soliton-Core™, Geodesic-AI™, TensorRT / edge deployment
Swarm without a command node
Why it is hard: Central ground stations die in jamming. Clusters of 4–32 aircraft must reallocate tasks and hand off targets peer-to-peer.
Done looks like: SwarmMesh-X maintains perimeter sweeps after satellite and RF links go dark.
SwarmMesh-X™, Coherence-X™, VECTOR-S™
Sensor fusion under time pressure
Why it is hard: Global-shutter stereo, ToF depth, and optical flow must stay hardware-synchronized at 60 FPS with no USB bottlenecks.
Done looks like: Argus-Eye streams raw MIPI CSI-2 into the cognition stack with deterministic timestamps.
Argus-Eye™, Parallax-Array™, perception HAL
Tracks
We hire by problem domain, not by generic job titles. Pick the fight that matches your craft.
Edge ML & autonomy
Quantize, compile, and validate world models that fly on latent state — not decoded pixels.
RTOS & deterministic middleware
Own the bridge between Linux ROS 2 and FreeRTOS motor loops where microseconds matter.
Perception & sensor fusion
Ship synchronized multi-spectral vision pods and the HAL that feeds Geodesic-AI.
Simulation & validation
Build the gates that keep sim-to-real honest before a propeller spins on hardware.
Avionics integration
Integrate Jetson, coprocessors, EMI-shielded compute, and airframe interfaces end to end.
The engine room
You will orchestrate real agentic workflows, complex software architecture, and physical AI models that deploy directly to hardware — not slideware.
- SimulateNVIDIA Omniverse · Isaac Sim · Pegasus physics in NavierForge
- DegradeWind, noise, occlusion, and balance sweeps in Continuum-Sim
- DeployROS 2 cognition → Isochrone-RT → FreeRTOS actuation on Soliton-Core
- ProveBench and airframe logs close the loop back into the twin
Stack touchpoints: ROS 2, FreeRTOS, TensorRT, Omniverse / Isaac Sim, custom HAL, and IP we own from silicon to cognition.
Headquarters — Mohali & Chandigarh
Our lab is an elite, highly focused headquarters away from the typical startup echo chamber. Hardware benches, edge compute, and flight software live in the same building. Decisions happen in hours, not quarters.
Roles that touch airframes, RF, and integration are on-site. Software tracks may hybridize when the work is provably remote — we state expectations up front so you know what you are signing up for.
How to apply
Email info@torusambitio.com with subject line Torus Lab application. Include your track, links to code or sim video, and three sentences on the hardest problem you have solved.
We review for depth — RTOS patches, edge ML deployments, perception stacks, and sim harnesses beat generic résumés.